Senior Layout Engineer

Analog Devices

Producción de semiconductores

Valencia, Comunidad Valenciana - Spanien

Project Manager Sénior / Especialista sénior

Experteer Overview

In this role you will lead complex block and top-level layouts for mixed-signal/analog circuits across advanced CMOS processes, collaborating with design, verification, and packaging teams. You will mentor junior engineers, drive layout reviews, and optimize for performance, manufacturability, and reliability. You will develop best practices and support package integration, contributing to the MEMS program’s technical excellence and global impact.

Responsabilidades

Lead and execute complex block and top-level layouts for mixed-signal/analog circuits in 180nm and 40nm CMOS and DMOS technologies
Collaborate with design, verification, and packaging teams across multiple sites
Drive layout reviews and provide technical guidance to less experienced engineers
Optimize layouts for performance, manufacturability, and reliability, focusing on matching, symmetry, and parasitic minimization
Develop and document best practices, methodologies, and layout flows
Support package design integration as needed

Requisitos principales

BSEE degree or equivalent with 4+ years in mixed-signal/analog full custom layout IC
Hands-on experience with 180nm and 40nm CMOS and DMOS technologies
Deep knowledge of device physics, semiconductor processing, and advanced layout techniques
Proficiency in Cadence Virtuoso and Calibre
Demonstrated ability to lead layout projects and mentor junior engineers
Strong problem-solving, organizational, and communication skills
Self-driven, detail-oriented, and committed to continuous improvement
Collaborative mindset and ability to work in a global team
High tolerance for ambiguity and passion for innovation

problem-solving organization communication Mixed-Signal/Analog full custom layout CMOS 180nm and 40nm DMOS technologies

Descripción del puesto

In this role you will lead complex block and top-level layouts for mixed-signal/analog circuits across advanced CMOS processes, collaboratin…

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